The growing complexity of systems-on-chips, including increased complexity in commercial blocks of intellectual property (IP) blocks, creates challenges in optimizing the interfaces between a core microprocessor and its peripherals.

Platform-based methodology involves building and configuring a design around a stable core platform and connecting by means of standard buses which have been optimized for use with the processor core.

The Platform Express™ environment verifies the viability of interfaces in the portion of the design surrounding the embedded processor and its attached peripherals. By automating tedious and error-prone design creation and verification steps, Platform Express shortens product development cycles and allows designers to focus on product differentiators